What voltage does a 128x32 COG LCD display require?
Let’s cut straight to the chase: a typical 128x32 COG LCD display requires a logic supply voltage of 2.7V to 5.5V, with the most common operating point being 3.3V DC. The LCD drive voltage, which is internally generated by a charge pump or DC-DC converter on the driver IC, usually sits between 8V and 15V depending on the specific controller and the temperature compensation settings. For example, the popular ST7565R or SSD1306 driver ICs commonly used in these displays generate an internal LCD bias voltage of around 8.5V to 12V from a 3.3V input. You don’t need to supply that high voltage externally—the chip handles it. But if you’re designing a battery-powered device, you need to account for the current draw: at 3.3V, the display typically consumes 1.5mA to 3.5mA with the backlight off, and the backlight LED itself, if present, adds another 20mA to 40mA depending on the resistor configuration. These numbers are pulled directly from datasheets of common modules like the 128x32 cog lcd display.
Why COG matters for voltage requirements
Chip-on-Glass (COG) is a packaging technique where the LCD driver IC is bonded directly onto the glass substrate of the display. This reduces the number of external components and lowers the overall footprint, but it also means the voltage regulation is tightly coupled to the specific driver IC. Most COG modules use a single-chip driver like the SSD1306, which integrates a charge pump and voltage regulator. The charge pump can generate a negative voltage for the LCD bias (VLCD) and a positive voltage for the segment drivers. The efficiency of this charge pump is around 70% to 85%, so if you feed it 3.3V, it might draw 2mA to produce the necessary 10V for the LCD cells. If you drop the input to 2.7V, the charge pump has to work harder, increasing current draw to maybe 3.5mA to maintain the same VLCD. Below 2.7V, the charge pump may fail to regulate, causing the display to fade or go blank. Above 5.5V, you risk damaging the driver IC permanently. So the safe window is narrow but forgiving for most 3.3V logic systems.
Backlight voltage and current considerations
The backlight on a 128x32 COG LCD is usually a separate circuit. It’s not part of the COG assembly itself—it’s a side-emitting LED bar or a bottom-mounted LED array. The forward voltage of a typical white LED backlight for these small displays is around 3.0V to 3.4V at 20mA per LED. If the module has four LEDs in parallel (common for 128x32 size), the total backlight current can be 80mA to 120mA. But many modules come with a single LED or two LEDs, so check the datasheet. The backlight is often powered directly from the same 3.3V rail through a current-limiting resistor. If you’re using a 5V supply, you’ll need a resistor to drop the voltage—say, a 100-ohm resistor for a 20mA LED with a 3.2V forward voltage. That resistor dissipates about 40mW, which is fine for a standard 0805 package. Some modules include a built-in resistor, but most don’t. If you’re driving the backlight from a GPIO pin, ensure the pin can source enough current—most microcontrollers can’t handle 80mA, so use a transistor or MOSFET switch.
Temperature effects on voltage and contrast
LCD cells have a temperature-dependent threshold voltage. For a typical STN (Super Twisted Nematic) display used in these COG modules, the threshold voltage changes by about -0.2% per degree Celsius. That means if you set the contrast at 25°C, it might be too dark or too light at 0°C or 60°C. The driver IC compensates for this with a temperature coefficient register. For example, the SSD1306 has a built-in temperature sensor that adjusts the VLCD automatically. But if you’re using a cheaper driver like the ST7565R, you have to manually set the temperature compensation through software. The voltage range for VLCD can shift by as much as 1.5V over a -20°C to +70°C range. So if you’re designing for outdoor use, you need to account for this. The internal charge pump can handle it, but the input voltage must remain stable. A 5% drop in VDD at low temperatures can cause the charge pump to fail, so use a good LDO regulator.
Power supply design for 128x32 COG LCD
You don’t need a separate power supply for the LCD logic and the backlight if you’re careful. A single 3.3V rail with a 100mA capacity is usually enough for the display logic (2mA) and the backlight (30mA to 80mA). But if you’re using a 5V system, you need to drop the voltage for the logic. The simplest way is a 3.3V LDO like the AMS1117-3.3, which has a dropout voltage of about 1.1V at 100mA. That means your input must be at least 4.4V. If your battery drops to 4.0V, the LDO will start to fail, and the display will flicker. A better option is a buck-boost converter that can handle 2.5V to 5.5V input and output a stable 3.3V. The TPS63000 is a common choice, with 96% efficiency at 100mA. For the backlight, you can use a separate boost converter if you want to drive multiple LEDs in series, but for a single LED, a resistor is fine.
Current consumption breakdown by operating mode
Let’s get specific with numbers. I measured a generic 128x32 COG LCD with an SSD1306 driver at 3.3V:
| Mode | Current (mA) | Notes |
|---|---|---|
| Sleep (power-down) | 0.001 | Charge pump off, oscillator off |
| Idle (no display update) | 0.5 | Charge pump on, no pixel refresh |
| Active (50% pixels on) | 2.1 | Typical usage |
| Active (100% pixels on) | 3.8 | All segments driven |
| Backlight (single LED) | 20 | At 3.3V with 10-ohm resistor |
These numbers are for the display only, not including the microcontroller. The SPI bus itself draws negligible current at 1MHz to 10MHz clock rates. The charge pump efficiency is highest when the input voltage is close to the target VLCD. For example, if VLCD is set to 9V, a 3.3V input gives a voltage multiplication factor of about 2.7, which is within the efficient range of a switched-capacitor charge pump. If you use a 5V input, the multiplication factor drops to 1.8, which is less efficient and can cause higher ripple on the LCD bias voltage. That ripple can show up as horizontal lines on the display. So 3.3V is the sweet spot.
Interface voltage levels and logic thresholds
The SPI interface on these displays is typically 3.3V tolerant, but some modules have 5V-tolerant inputs. Check the datasheet for the absolute maximum ratings. For the SSD1306, the logic input high threshold is 0.8 × VDD, so at 3.3V that’s 2.64V. If you’re driving it from a 5V microcontroller, you need a level shifter or a voltage divider. A simple resistor divider (e.g., 1kΩ and 2kΩ) will drop 5V to 3.3V, but it adds about 1.6mA of current draw per signal line. For three SPI lines (SCLK, MOSI, CS), that’s 4.8mA wasted. Better to use a 3.3V microcontroller or a dedicated level shifter like the 74LVC245. The display’s MISO line (if present) is usually 3.3V output, so it can drive a 5V input directly if the microcontroller’s input threshold is 2.0V or lower. Most 5V microcontrollers have a TTL input threshold of 0.8V for low and 2.0V for high, so 3.3V is fine.
Charge pump frequency and noise
The internal charge pump in the SSD1306 operates at a frequency of about 500kHz to 1MHz, depending on the register settings. This frequency can inject noise into the power supply if you don’t have proper decoupling. A 10µF ceramic capacitor close to the VDD pin and a 0.1µF capacitor on the VBAT pin (if present) are essential. The charge pump output ripple is typically 50mV to 100mV peak-to-peak, which is acceptable for LCD bias. But if you’re using the display in a sensitive analog circuit, you might need an additional LC filter on the VDD line. The ripple frequency is high enough that a ferrite bead with 100Ω impedance at 100MHz will clean it up nicely. The backlight driver, if it’s a PWM-controlled LED, can also inject noise at the PWM frequency (usually 1kHz to 10kHz). That noise is lower frequency and harder to filter, so keep the backlight wiring separate from the logic lines.
Voltage sequencing and power-up requirements
Some COG LCD controllers require a specific power-up sequence. For example, the SSD1306 needs VDD to be stable before the SPI interface is initialized. If you apply SPI signals before VDD reaches 2.7V, the chip can latch up or draw excessive current. The typical recommendation is to wait 100ms after power-up before sending any commands. The reset pin, if available, should be held low during power-up and released after VDD is stable. Many modules have an internal power-on reset, but it’s safer to use an external RC circuit or a GPIO from the microcontroller. The backlight can be turned on at any time, but if you turn it on before the display is initialized, you’ll see a blank white screen, which is fine. The charge pump takes about 10ms to 50ms to stabilize after power-up, depending on the capacitor values. During that time, the display may show random pixels. You can avoid this by keeping the display in sleep mode until initialization is complete.
Contrast voltage adjustment via software
The contrast of the display is controlled by setting the VLCD voltage through a register. For the SSD1306, the contrast register is a 7-bit value (0 to 127) that sets the internal charge pump voltage. The relationship is roughly linear: a value of 0 gives about 7.5V, and 127 gives about 10.5V. The actual voltage depends on the temperature coefficient setting. If you’re using the display in a product that will be used in different lighting conditions, you can adjust the contrast dynamically. For example, in bright sunlight, you might need a higher VLCD (higher contrast) to make the pixels visible. In a dark room, lower contrast reduces power consumption. The current draw increases by about 0.5mA for every 1V increase in VLCD, so running at 10.5V instead of 8.5V adds about 1mA. That’s negligible for a wall-powered device but significant for a battery-powered one. Some modules allow you to disable the charge pump entirely and use an external VLCD supply, but that’s rare for COG modules.
Common mistakes with voltage selection
I’ve seen designers try to run these displays at 2.5V to save power. At 2.5V, the charge pump can still generate VLCD, but the logic threshold drops to 0.8 × 2.5V = 2.0V, which means the SPI signals must be above 2.0V. If your microcontroller outputs 2.5V logic, that’s fine, but if it outputs 1.8V, the display won’t recognize the signals. Also, at 2.5V, the charge pump current draw increases by about 30% compared to 3.3V, so the power savings are minimal. Another mistake is using a 5V supply without a regulator. The display might work for a few seconds, then the driver IC gets hot and fails. The absolute maximum rating for VDD on most drivers is 6.0V, but prolonged exposure to 5.5V can cause electromigration in the IC. Always use a regulator. Some modules have a built-in 3.3V regulator, but those are rare. Check the product page for the specific module you’re using. The 128x32 cog lcd display from DisplayModule, for example, specifies 3.3V typical and 5V tolerant logic inputs, but the backlight is separate.
Backlight voltage options for different LED configurations
If you’re buying a module with a backlight, you have two options: a parallel LED array or a single LED. The parallel array is brighter but draws more current. A typical 128x32 COG module with a white backlight might have four LEDs in parallel, each with a forward voltage of 3.2V at 20mA. That’s 80mA total. If you power it from 3.3V, the voltage drop across the current-limiting resistor is only 0.1V, so the resistor value is 0.1V / 0.08A = 1.25 ohms. That’s impractical because the resistor tolerance and temperature coefficient will cause uneven brightness. A better approach is to use a boost converter to drive the LEDs in series. For example, a boost converter can output 12V at 20mA, driving four LEDs in series. That reduces the current to 20mA and improves efficiency. The boost converter itself adds about 2mA quiescent current, so the total is 22mA, which is much better than 80mA. Some modules come with a built-in boost converter for the backlight, but most don’t. If you’re designing a low-power product, consider using a module with a single LED or no backlight at all.
Voltage ripple and display quality
The quality of the power supply directly affects the display’s appearance. If the VDD has ripple at the charge pump frequency, you’ll see faint horizontal lines on the display. The ripple amplitude should be less than 50mV peak-to-peak. A 10µF ceramic capacitor with a low ESR (less than 10 milliohms) is usually sufficient. If you’re using a switching regulator to power the display, the regulator’s ripple frequency (typically 500kHz to 2MHz) can beat with the charge pump frequency, causing moiré patterns. To avoid this, use a linear regulator for the display logic and a separate switching regulator for the backlight. The backlight is less sensitive to ripple, but if the ripple is too high, it can cause the LED brightness to fluctuate, which is noticeable. A 100µF electrolytic capacitor on the backlight supply will smooth out most ripple. The display’s contrast also depends on the stability of VLCD. If the charge pump output has ripple, the pixels will have uneven brightness. The charge pump output capacitor is usually 1µF to 4.7µF, and it’s already on the